Restriction on Use of 8-bit Timers

Jul,2005

Dear Customer

With regard to our TLCS-900/L1 Series and TLCS-900/H1 Series of 16-bit microcontrollers, we have found that the following problem may occur when 8-bit timers are used under certain conditions.

Problem

If the timer register of an 8-bit timer is updated under the following conditions, the timer flip-flop may output an unexpected value.

Conditions

This problem occurs if all the following conditions are met:

• When the 8-bit timer is used in PWM or PPG mode
• When the double buffer is enabled
• When the data in the register buffer is updated immediately before an overflow occurs in the up-counter

Workaround

This problem can be avoided by software by using either of the following methods:

1. Disable the double buffer.
   (After reset the double buffer is initially disabled.)
2. Observe the following timing requirement when writing new data to the register buffer:
   a) In the case of using PWM mode
   Write new data to the register buffer by six cycles before the next overflow occurs, using the interrupt routine to be activated by an overflow interrupt.
   b) In the case of using PPG mode
   Write new data to the register buffer by six cycles before the next cycle compare match occurs, using the interrupt routine to be activated by a cycle compare match interrupt (*).
   (*) An interrupt that specifies when to transfer data from the register bufferto the timer register

Inquiries

To Inquiries on our products.

Important Notices top

• 

• Products
  • Microcomputer
    • Important Notices
• Applications
• Company Profile
• News and Event
• Support

• Terms of Use
• Site Map
• 日本語
• 简体中文
• 繁體中文

Top of this page